Power consumption is a significant limitation on the utility of many electronic devices. Portable devices rely on battery power or other portable power sources. Batteries, for example, add significant weight to a portable device and have limited power storage capacity. Hence, greater power consumption by a device typically either creates a demand for larger batteries or leads to shorter battery lifetime.
Several approaches exist for the reduction of power consumption in portable devices. For example, components can be carefully selected for the demands of a particular device so that no more power is consumed than needed. Further, electronic circuits may utilize low-power design features. Alternatively, electronic circuits can be designed to vary their power consumption. For example, microprocessors can be designed to vary their operational frequency as the processing demand on the device varies.
Reduction of transistor feature sizes is a standard approach to the reduction of power consumption in digital integrated circuits. Reduction of transistor feature dimensions, for example, the gate length, permits use of lower supply voltages, and leads to reduced power consumption.
As feature sizes and supply voltage scale downward, lower threshold voltages, i.e., switching voltages, are typically selected to maintain device performance. Device power consumption arises, in large part, due to dynamic switching and due to leakage currents. Hence, power efficient digital circuit designs have utilized the ability to reduce power consumption via thoughtful selection of transistor supply voltages and threshold voltages.
Dynamic power consumption arises from the charging and discharging of capacitances, and is proportional to the square of the supply voltage. Leakage power consumption arises from subthreshold leakage currents that occur when threshold voltages are so small that a device cannot turn off strongly. Leakage currents increase exponentially as the threshold voltage is reduced.
Historically, dynamic switching losses have dominated leakage losses. Hence, supply voltage scaling has been one of the most effective ways to reduce operating power. For applications that entail a variable operating frequency, Dynamic Voltage Scaling (“DVS”) and frequency scaling have been used to reduce power consumption. The supply voltage is scaled while the computation time is extended as much as allowable by variations in the processing rate. In essence, frequency and power consumption are reduced with reduced processing rate demand, i.e., workload demand, to reduce overall device power consumption.
Leakage currents, however, place a lower limit on supply voltage scaling. Supply and threshold voltages are often selected to minimize idle mode power consumption, which arises from sub-threshold leakage. Adaptive substrate biasing has been used to provide reduced threshold voltage operation during active periods, and high threshold voltage operation during inactive periods. This use of adaptive substrate biasing can provide reduced overall power consumption due to leakage losses.
Nevertheless, achieving reduced total power consumption grows ever more challenging as new devices incorporate ever smaller integrated circuit design features.